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» Evaluation of Hierarchical Mesh Reorderings
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ICCS
2009
Springer
13 years 11 months ago
Evaluation of Hierarchical Mesh Reorderings
Irregular and sparse scientific computing programs frequently experience performance losses due to inefficient use of the memory system in most machines. Previous work has shown t...
Michelle Mills Strout, Nissa Osheim, Dave Rostron,...
COLING
2010
12 years 11 months ago
Hierarchical Phrase-based Machine Translation with Word-based Reordering Model
Hierarchical phrase-based machine translation can capture global reordering with synchronous context-free grammar, but has little ability to evaluate the correctness of word order...
Katsuhiko Hayashi, Hajime Tsukada, Katsuhito Sudoh...
ICS
1999
Tsinghua U.
13 years 9 months ago
Improving memory hierarchy performance for irregular applications
The performance of irregular applications on modern computer systems is hurt by the wide gap between CPU and memory speeds because these applications typically underutilize multi-...
John M. Mellor-Crummey, David B. Whalley, Ken Kenn...
HPCA
2009
IEEE
14 years 5 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
VTC
2007
IEEE
13 years 11 months ago
Time Behaviour and Network Encumbrance Due to Authentication in Wireless Mesh Access Networks
— In this paper we investigate the authentication behaviour of mobile nodes within wireless mesh access networks. This work evaluates the authentication time and the authenticati...
Andreas Roos, S. Wieland, A. Th. Schwarzbacher, Ba...