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ARCS
2004
Springer
13 years 8 months ago
Evaluation of Run-Time Reconfiguration for General-Purpose Computing
: In order to investigate the impact of dynamic hardware reconfiguration on general-purpose applications, we present a superscalar micro-architecture that includes a variable numbe...
Adronis Niyonkuru, Hans Christoph Zeidler
FPGA
1997
ACM
132views FPGA» more  FPGA 1997»
13 years 9 months ago
Wormhole Run-Time Reconfiguration
Configurable Computing Machines (CCMs) are an emerging class of computing platform which provide the computational performance benefits of ASICs, yet retain the flexibility and ra...
Ray Bittner, Peter M. Athanas
IPPS
2000
IEEE
13 years 9 months ago
Optimization of Motion Estimator for Run-Time-Reconfiguration Implementation
In this paper, we present a method to estimate the number of reconfiguration steps that a time-constrained algorithm can accommodate. This analysis demonstrates how one would attac...
Camel Tanougast, Yves Berviller, Serge Weber
ERSA
2009
129views Hardware» more  ERSA 2009»
13 years 2 months ago
Data path Configuration Time Reduction for Run-time Reconfigurable Systems
- The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
Mahmood Fazlali, Ali Zakerolhosseini, Mojtaba Sabe...
PPL
2008
124views more  PPL 2008»
13 years 4 months ago
Experimental Evaluation of BSP Programming Libraries
The model of bulk-synchronous parallel computation (BSP) helps to implement portable general purpose algorithms while keeping predictable performance on different parallel compute...
Peter Krusche