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ISCA
2010
IEEE
336views Hardware» more  ISCA 2010»
13 years 10 months ago
Reducing cache power with low-cost, multi-bit error-correcting codes
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...
BIRTHDAY
2003
Springer
13 years 11 months ago
Spatial Data Management for Virtual Product Development
Abstract: In the automotive and aerospace industry, millions of technical documents are generated during the development of complex engineering products. Particularly, the universa...
Hans-Peter Kriegel, Martin Pfeifle, Marco Pöt...
MOBISYS
2005
ACM
14 years 5 months ago
A dynamic operating system for sensor nodes
Sensor network nodes exhibit characteristics of both embedded systems and general-purpose systems. They must use little energy and be robust to environmental conditions, while als...
Chih-Chieh Han, Ram Kumar, Roy Shea, Eddie Kohler,...
NOCS
2009
IEEE
14 years 15 days ago
A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
Anh T. Tran, Dean Truong, Bevan M. Baas
LCTRTS
2007
Springer
13 years 12 months ago
Generalizing parametric timing analysis
In the design of real-time and embedded systems, it is important to establish a bound on the worst-case execution time (WCET) of programs to assure via schedulability analysis tha...
Joel Coffman, Christopher A. Healy, Frank Mueller,...