23 search results - page 5 / 5 » Experimental Study of Geometric t-Spanners: A Running Time C... |
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
PPAM
2007
Springer
13 years 11 months ago
2007
Springer
This work concentrates on the design of a system intended for study of advanced scheduling techniques for planning various types of jobs in a Grid environment. The solution is able...
ICCAD
2004
IEEE
14 years 2 months ago
2004
IEEE
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...