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SBACPAD
2007
IEEE
121views Hardware» more  SBACPAD 2007»
13 years 11 months ago
DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic
SIGCOMM
2009
ACM
13 years 11 months ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
PDIS
1994
IEEE
13 years 9 months ago
Distributed Selective Dissemination of Information
To help users cope with information overload, Selective Dissemination of Information SDI will increasingly become an important tool in wide area information systems. In an SDI ser...
Tak W. Yan, Hector Garcia-Molina
IPPS
2008
IEEE
13 years 11 months ago
Data throttling for data-intensive workflows
— Existing workflow systems attempt to achieve high performance by intelligently scheduling tasks on resources, sometimes even attempting to move the largest data files on the hi...
Sang-Min Park, Marty Humphrey
FPGA
2004
ACM
119views FPGA» more  FPGA 2004»
13 years 10 months ago
A quantitative analysis of the speedup factors of FPGAs over processors
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...
Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vis...