This paper proposes an optimization algorithm for reducing the power dissipation in a sequential circuit. The encoding of the different states in a Finite State Machine is modifie...
S. Chuisano, Fulvio Corno, Paolo Prinetto, Maurizi...
This paper considers the testability implications of low power design methodologies. Low power and high testability are shown to be highly contrasting requirements, and an optimiz...
Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Mau...
In this paper, we present a functional partitioning method for low power real-time distributed embedded systems whose constituent nodes are systems-on-a-chip (SOCs). The systemlev...
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
A series of papers, all under the title of Algorithmic Algebraic Model Checking (AAMC), has sought to combine techniques from algorithmic algebra, model checking and dynamical syst...