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ERSA
2004
130views Hardware» more  ERSA 2004»
13 years 7 months ago
Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...
Ronald Scrofano, Viktor K. Prasanna
IPPS
2000
IEEE
13 years 10 months ago
Fast Synchronization on Scalable Cache-Coherent Multiprocessors using Hybrid Primitives
This paper presents a new methodology for implementing fast synchronization on scalable cache-coherent multiprocessors, through the use of hybrid primitives. Hybrid primitives lev...
Dimitrios S. Nikolopoulos, Theodore S. Papatheodor...
ICCS
2007
Springer
13 years 11 months ago
A Combined Hardware/Software Optimization Framework for Signal Representation and Recognition
This paper describes a signal recognition system that is jointly optimized from mathematical representation, algorithm design and final implementation. The goal is to exploit sign...
Melina Demertzi, Pedro C. Diniz, Mary W. Hall, Ann...
PPL
2008
88views more  PPL 2008»
13 years 5 months ago
Evaluating Computational Costs while Handling Data and Control Parallelism
The aim of this work is to introduce a computational costs system associated to a semantic framework for orthogonal data and control parallelism handling. In such a framework a pa...
Sonia Campa
DAC
2002
ACM
14 years 6 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik