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FPL
2006
Springer
242views Hardware» more  FPL 2006»
13 years 8 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
ICDCS
2011
IEEE
12 years 4 months ago
YSmart: Yet Another SQL-to-MapReduce Translator
— MapReduce has become an effective approach to big data analytics in large cluster systems, where SQL-like queries play important roles to interface between users and systems. H...
Rubao Lee, Tian Luo, Yin Huai, Fusheng Wang, Yongq...
CLUSTER
2004
IEEE
13 years 8 months ago
Scalable, high-performance NIC-based all-to-all broadcast over Myrinet/GM
All-to-all broadcast is one of the common collective operations that involve dense communication between all processes in a parallel program. Previously, programmable Network Inte...
Weikuan Yu, Dhabaleswar K. Panda, Darius Buntinas
IPPS
2003
IEEE
13 years 10 months ago
Applying Aspect-Orient Programming Concepts to a Component-Based Programming Model
Abstract— The execution environments For scientific applications have evolved significantly over the years. Vector and parallel architectures have provided significantly faste...
Thomas Eidson, Jack Dongarra, Victor Eijkhout
IPPS
2002
IEEE
13 years 9 months ago
Can User-Level Protocols Take Advantage of Multi-CPU NICs?
Modern high speed interconnects such as Myrinet and Gigabit Ethernet have shifted the bottleneck in communication from the interconnect to the messaging software at the sending an...
Piyush Shivam, Pete Wyckoff, Dhabaleswar K. Panda