Sciweavers

42 search results - page 2 / 9
» Exploiting refactoring in formal verification
Sort
View
FMCAD
2007
Springer
13 years 10 months ago
Formal Verification of Partial Good Self-Test Fencing Structures
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
Adrian E. Seigler, Gary A. Van Huben, Hari Mony
ENTCS
2006
130views more  ENTCS 2006»
13 years 4 months ago
LSC Verification for UML Models with Unbounded Creation and Destruction
The approaches to automatic formal verification of UML models known up to now require a finite bound on the number of objects existing at each point in time. In [4] we have observ...
Bernd Westphal
ICCD
2004
IEEE
137views Hardware» more  ICCD 2004»
14 years 1 months ago
Comparative Study of Strategies for Formal Verification of High-Level Processors
Compared are different methods for evaluation of formulas expressing microprocessor correctness in the logic of Equality with Uninterpreted Functions and Memories (EUFM) by transl...
Miroslav N. Velev
CSAC
2006
13 years 6 months ago
Toward a Pi-Calculus Based Verification Tool for Web Services Orchestrations
Abstract. Web services constitute a dynamic field of research about technologies of the Internet. WS-BPEL 2.0, is in the way for becoming a standard for defining Web services orche...
Faisal Abouzaid
AMI
2008
Springer
13 years 6 months ago
An Ambient Agent Model Exploiting Workflow-Based Reasoning to Recognize Task Progress
For an ambient intelligent agent to support a human in demanding tasks it is important to be aware of the progress made in a given workflow. It would be possible to interact with t...
Fiemke Both, Mark Hoogendoorn, Jan Treur