Sciweavers

19 search results - page 4 / 4
» Exploiting shared scratch pad memory space in embedded multi...
Sort
View
CODES
2008
IEEE
13 years 11 months ago
Scratchpad allocation for concurrent embedded software
Software-controlled scratchpad memory is increasingly employed in embedded systems as it offers better timing predictability compared to caches. Previous scratchpad allocation alg...
Vivy Suhendra, Abhik Roychoudhury, Tulika Mitra
ISHPC
1999
Springer
13 years 9 months ago
Utilization of Cache Area in On-Chip Multiprocessor
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
Hitoshi Oi, N. Ranganathan
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
13 years 10 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
LCTRTS
2004
Springer
13 years 10 months ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai