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ISLPED
1997
ACM
58views Hardware» more  ISLPED 1997»
13 years 9 months ago
Exploiting the locality of memory references to reduce the address bus energy
Enric Musoll, Tomás Lang, Jordi Cortadella
ISCA
1991
IEEE
110views Hardware» more  ISCA 1991»
13 years 8 months ago
Dynamic Base Register Caching: A Technique for Reducing Address Bus Width
When address reference streams exhibit high degrees of spatial and temporal locality, many of the higher order address lines carry redundant information. By caching the higher ord...
Matthew K. Farrens, Arvin Park
ICCD
2004
IEEE
96views Hardware» more  ICCD 2004»
14 years 1 months ago
Dynamic Address Compression Schemes: A Performance, Energy, and Cost Study
Dynamic address compression schemes that exploit address locality can help reduce both address bus energy and cost simultaneously with only a small performance penalty. In this wo...
Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Maha...
VLSID
2003
IEEE
108views VLSI» more  VLSID 2003»
14 years 5 months ago
A Low Power-Delay Product Page-Based Address Bus Coding Method
The working-zone encoding (WZE) method employing locality of memory reference was previously proposed to reduce address bus switching activity. This paper presents an encoding met...
Chi-Ming Tsai, Guang-Wan Liao, Rung-Bin Lin
DSD
2006
IEEE
174views Hardware» more  DSD 2006»
13 years 8 months ago
Energy-Efficient Cache Coherence for Embedded Multi-Processor Systems through Application-Driven Snoop Filtering
Title of thesis: Energy-Efficient Cache Coherence for Embedded Multi-Processor Systems through Application-Driven Snoop Filtering Alokika Dash, Master of Science, 2006 Thesis dire...
Alokika Dash, Peter Petrov