14 search results - page 3 / 3 » Exploring Area Delay Tradeoffs in an AES FPGA Implementation |
ICASSP
2008
IEEE
13 years 11 months ago
2008
IEEE
Particle filtering methods provide powerful techniques for solving non-linear state-estimation problems, and are applied to a variety of application areas in signal processing. Be...
FPGA
2001
ACM
13 years 9 months ago
2001
ACM
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
CODES
2009
IEEE
13 years 8 months ago
2009
IEEE
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...