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ISVLSI
2003
IEEE
118views VLSI» more  ISVLSI 2003»
13 years 10 months ago
Networks-On-Chip: The Quest for On-Chip Fault-Tolerant Communication
In this paper, we discuss the possibility of achieving onchip fault-tolerant communication based on a new communication paradigm called stochastic communication. Specifically, for...
Radu Marculescu
CAL
2008
13 years 4 months ago
BENoC: A Bus-Enhanced Network on-Chip for a Power Efficient CMP
Network-on-Chips (NoCs) outperform buses in terms of scalability, parallelism and system modularity and therefore are considered as the main interconnect infrastructure in future c...
I. Walter, Israel Cidon, Avinoam Kolodny
GLOBECOM
2010
IEEE
13 years 2 months ago
Circulant-Graph-Based Fault-Tolerant Routing for All-Optical WDM LANs
High demands in data delivery latency and communication reliability encourage the use of fault-toleranceenhanced all-optical WDM networks. Low latency is satisfied by setting up a ...
Dexiang Wang, Janise McNair
DSN
2006
IEEE
13 years 10 months ago
Exploring Fault-Tolerant Network-on-Chip Architectures
The advent of deep sub-micron technology has exacerbated reliability issues in on-chip interconnects. In particular, single event upsets, such as soft errors, and hard faults are ...
Dongkook Park, Chrysostomos Nicopoulos, Jongman Ki...
PPSN
2004
Springer
13 years 10 months ago
Evolving Genetic Regulatory Networks for Hardware Fault Tolerance
We present a new approach that is able to produce an increased fault tolerance in bio-inspired electronic circuits. To this end, we designed hardwarefriendly genetic regulatory net...
Arne Koopman, Daniel Roggen