12 search results - page 1 / 3 » Exploring High Bandwidth Pipelined Cache Architecture for Sc... |
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
MICRO
2009
IEEE
13 years 12 months ago
2009
IEEE
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
ISCA
1997
IEEE
13 years 9 months ago
1997
IEEE
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
HPCA
2007
IEEE
13 years 11 months ago
2007
IEEE
To provide high dependability in a multithreaded system despite hardware faults, the system must detect and correct errors in its shared memory system. Recent research has explore...
HPCA
2005
IEEE
14 years 5 months ago
2005
IEEE
If current technology scaling trends hold, leakage power dissipation will soon become the dominant source of power consumption in high performance processors. Caches, due to the f...