171 search results - page 1 / 35 » Exploring Very Low-Energy Logic: A Case Study |
JOLPE
2007
13 years 6 months ago
2007
IJCAI
2001
13 years 7 months ago
2001
We present an empirical analysis of optimization techniques devised to speed up the so-called TBox classification supported by description logic systems which have to deal with ve...
DAC
1997
ACM
13 years 10 months ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
MEMOCODE
2006
IEEE
14 years 2 days ago
2006
IEEE
Hand-held devices have rigid constraints regarding power dissipation and energy consumption. Whether a new functionality can be supported often depends upon its power requirements...
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...