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» Exploring the VLSI Scalability of Stream Processors
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GLVLSI
2009
IEEE
170views VLSI» more  GLVLSI 2009»
13 years 9 months ago
Physical unclonable function and true random number generator: a compact and scalable implementation
Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) are two very useful components in secure system design. PUFs can be used to extract chip-unique signat...
Abhranil Maiti, Raghunandan Nagesh, Anand Reddy, P...
RECONFIG
2009
IEEE
182views VLSI» more  RECONFIG 2009»
14 years 6 days ago
Scalability Studies of the BLASTn Scan and Ungapped Extension Functions
BLASTn is a ubiquitous tool used for large scale DNA analysis. Detailed profiling tests reveal that the most computationally intensive sections of the BLASTn algorithm are the sc...
Siddhartha Datta, Ron Sass
VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
14 years 5 months ago
Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks
We present an innovative design of an accurate, 2D DCT IDCT processor, which handles scaled and sub-sampled input blocks efficiently. In the IDCT mode, the latency of the processo...
Rohini Krishnan, Om Prakash Gangwal, Jos T. J. van...
DAC
2009
ACM
14 years 6 months ago
Multicore parallel min-cost flow algorithm for CAD applications
Computational complexity has been the primary challenge of many VLSI CAD applications. The emerging multicore and manycore microprocessors have the potential to offer scalable perf...
Yinghai Lu, Hai Zhou, Li Shang, Xuan Zeng
ASPLOS
1998
ACM
13 years 9 months ago
Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
Walter Lee, Rajeev Barua, Matthew Frank, Devabhakt...