Sciweavers

42 search results - page 8 / 9
» Exploring the design space of LUT-based transparent accelera...
Sort
View
DATE
2009
IEEE
81views Hardware» more  DATE 2009»
13 years 11 months ago
ReSim, a trace-driven, reconfigurable ILP processor simulator
— Modern processors are becoming more complex and as features and application size increase, their evaluation is becoming more time-consuming. To date, design space exploration r...
Sotiria Fytraki, Dionisios N. Pnevmatikatos
VLSI
2007
Springer
13 years 11 months ago
Simulation of hybrid computer architectures: simulators, methodologies and recommendations
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
Pranav Vaidya, Jaehwan John Lee
FPL
2003
Springer
95views Hardware» more  FPL 2003»
13 years 10 months ago
A Model for Hardware Realization of Kernel Loops
Abstract. Hardware realization of kernel loops holds the promise of accelerating the overall application performance and is therefore an important part of the synthesis process. In...
Jirong Liao, Weng-Fai Wong, Tulika Mitra
FPL
2007
Springer
97views Hardware» more  FPL 2007»
13 years 8 months ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee
MM
2010
ACM
127views Multimedia» more  MM 2010»
13 years 5 months ago
Mining and cropping common objects from images
Discovering common objects that appear frequently in a number of images is a challenging problem, due to (1) the appearance variations of the same common object and (2) the enormo...
Gangqiang Zhao, Junsong Yuan