16 search results - page 2 / 4 » Eyecharts: constructive benchmarking of gate sizing heuristi... |
VLSID
1996
IEEE
13 years 8 months ago
1996
IEEE
Reduced Ordered Binary Decision Diagrams ROBDDs have traditionally been built in a bottom-up fashion. In this scheme, the intermediate peak memory utilization is often larger than...
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Power supply noise increases the circuit delay, which may lead to performance failure of a design. Decoupling capacitance (decap) addition is effective in reducing the power suppl...
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
Soft-core microprocessors mapped onto field-programmable gate arrays (FPGAs) represent an increasingly common embedded software implementation option. Modern FPGA soft-cores are p...
COMSWARE
2007
IEEE
13 years 11 months ago
2007
IEEE
— In this paper, we focus on the construction of an efficient dominating set in ad hoc and sensor networks. A set of nodes is said to be dominating if each node is either itself...
CGO
2008
IEEE
13 years 11 months ago
2008
IEEE
Modern compilers implement a large number of optimizations which all interact in complex ways, and which all have a different impact on code quality, compilation time, code size,...