— This paper presents a framework for fast and accurate static timing analysis considering coupling. With technology scaling to smaller dimensions, the impact of coupling induced...
Debasish Das, Ahmed Shebaita, Hai Zhou, Yehea I. I...
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part of nanometer VLSI design. Under the context of ti...
Statistical static timing analysis (SSTA) has emerged as an essential tool for nanoscale designs. Monte Carlo methods are universally employed to validate the accuracy of the appr...
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...