18 search results - page 2 / 4 » FRES-CAR: An Adaptive Cache Replacement Policy |
HPCA
2012
IEEE
12 years 12 days ago
2012
IEEE
The least recently used (LRU) replacement policy performs poorly in the last-level cache (LLC) because temporal locality of memory accesses is filtered by first and second level...
ECRTS
2006
IEEE
13 years 11 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
MICRO
2006
IEEE
13 years 10 months ago
2006
IEEE
We present and evaluate the idea of adaptive processor cache management. Specifically, we describe a novel and general scheme by which we can combine any two cache management alg...
ISCA
2006
IEEE
13 years 10 months ago
2006
IEEE
Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The notion of generating and servicing long-latency cache m...
ICS
2010
Tsinghua U.
13 years 7 months ago
2010
Tsinghua U.
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...