Sciweavers

17 search results - page 2 / 4
» Fast and Accurate Multiprocessor Architecture Exploration wi...
Sort
View
ISPASS
2006
IEEE
13 years 11 months ago
Accelerating architectural exploration using canonical instruction segments
Detailed microarchitectural simulators are not well suited for exploring large design spaces due to their excessive simulation times. We introduce AXCIS, a framework for fast and ...
Rose F. Liu, Krste Asanovic
CASES
2006
ACM
13 years 11 months ago
Automatic performance model construction for the fast software exploration of new hardware designs
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when there is only a simulator of the machine available. Designing such a compiler requ...
John Cavazos, Christophe Dubach, Felix V. Agakov, ...
TMC
2010
179views more  TMC 2010»
13 years 3 months ago
On Fast and Accurate Detection of Unauthorized Wireless Access Points Using Clock Skews
We explore the use of clock skew of a wireless local area network access point (AP) as its fingerprint to detect unauthorized APs quickly and accurately. The main goal behind usi...
Suman Jana, Sneha Kumar Kasera
ICCAD
1999
IEEE
115views Hardware» more  ICCAD 1999»
13 years 9 months ago
Fast performance analysis of bus-based system-on-chip communication architectures
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...
Kanishka Lahiri, Anand Raghunathan, Sujit Dey
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
13 years 10 months ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney