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» Fault Injection for Verifying Testability at the VHDL Level
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ICSOC
2010
Springer
13 years 4 months ago
A Programmble Fault Injection Testbed Generator for SOA
In this demo paper we present the prototype of our fault injection testbed generator. Our tool empowers engineers to generate emulated SOA environments and to program fault injecti...
Lukasz Juszczyk, Schahram Dustdar
SAFECOMP
1999
Springer
13 years 10 months ago
FlexFi: A Flexible Fault Injection Environment for Microprocessor-Based Systems
Microprocessor-based systems are increasingly used to control safety-critical systems (e.g., air and railway traffic control, nuclear plant control, aircraft and car control). In t...
Alfredo Benso, Maurizio Rebaudengo, Matteo Sonza R...
RTAS
2009
IEEE
14 years 15 days ago
The System-Level Simplex Architecture for Improved Real-Time Embedded System Safety
Embedded systems in safety-critical environments demand safety guarantees while providing many useful services that are too complex to formally verify or fully test. Existing appl...
Stanley Bak, Deepti K. Chivukula, Olugbemiga Adeku...
DT
2000
162views more  DT 2000»
13 years 5 months ago
RT-Level ITC'99 Benchmarks and First ATPG Results
Effective high-level ATPG tools are increasingly needed, as an essential element in the quest for reducing as much as possible the designer work on gate-level descriptions. We pro...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
13 years 10 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi