64 search results - page 1 / 13 » Fences in Weak Memory Models |
CAV
2010
Springer
13 years 8 months ago
2010
Springer
We present a class of relaxed memory models, defined in Coq, parameterised by the chosen permitted local reorderings of reads and writes, and the visibility of inter- and intra-pr...
CGO
2009
IEEE
13 years 11 months ago
2009
IEEE
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
SC
2005
ACM
13 years 10 months ago
2005
ACM
The memory consistency model in parallel programming controls the order in which operations performed by one thread may be observed by another. Language designers have been reluct...
PLDI
2012
ACM
11 years 7 months ago
2012
ACM
Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, al...
PLDI
2010
ACM
13 years 7 months ago
2010
ACM
The most intuitive memory model for shared-memory multithreaded programming is sequential consistency (SC), but it disallows the use of many compiler and hardware optimizations th...