39 search results - page 1 / 8 » Filter placement on a pipelined architecture |
IPPS
2009
IEEE
13 years 11 months ago
2009
IEEE
ICASSP
2011
IEEE
12 years 8 months ago
2011
IEEE
Current techniques used in pipelining recursive filters require significant hardware complexity. These techniques attempt to preserve the exact frequency response of the origina...
FCCM
2008
IEEE
13 years 11 months ago
2008
IEEE
Although pipelining or C-slowing an FPGA-based application can potentially dramatically improve the performance, this poses a question for conventional reconfigurable architecture...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...