77 search results - page 2 / 16 » Finite State Machine Decomposition For Low Power |
ASPDAC
2000
ACM
13 years 9 months ago
2000
ACM
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
The power consumption of a sequential circuit can be reduced by decomposing it into subcircuits which can be turned off when inactive. Power can also be reduced by careful state e...
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
— In this paper, we address the problem of FSM state assignment to minimize area and power. The objectives are targeted as single/independent as well as multi-objective optimizat...
ICC
2007
IEEE
13 years 11 months ago
2007
IEEE
The well known decomposition of a CPM signal into PAM waveforms represents the linear part of a CPM modulator. The paper deals with the non–linear part, not fully developed in t...
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...