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ISCA
2011
IEEE
229views Hardware» more  ISCA 2011»
12 years 9 months ago
TLSync: support for multiple fast barriers using on-chip transmission lines
As the number of cores on a single-chip grows, scalable barrier synchronization becomes increasingly difficult to implement. In software implementations, such as the tournament ba...
Jungju Oh, Milos Prvulovic, Alenka G. Zajic
ICDCN
2012
Springer
12 years 1 months ago
Lifting the Barriers - Reducing Latencies with Transparent Transactional Memory
Synchronization in distributed systems is expensive because, in general, threads must stall to obtain a lock or to operate on volatile data. Transactional memory, on the other hand...
Annette Bieniusa, Thomas Fuhrmann
ESOP
2011
Springer
12 years 9 months ago
Barriers in Concurrent Separation Logic
We develop and prove sound a concurrent separation logic for a language with Pthreads-style barriers. Although Pthreads barriers are widely used in systems, and separation logic is...
Aquinas Hobor, Cristian Gherghina
IPPS
1997
IEEE
13 years 9 months ago
A Reliable Hardware Barrier Synchronization Scheme
Barrier synchronization is a crucial operation for parallel systems. Many schemes have been proposed in the literature to achieve fast barrier synchronization through software, ha...
Rajeev Sivaram, Craig B. Stunkel, Dhabaleswar K. P...