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» Floorplanning with Datapath Optimization
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ISCAS
1995
IEEE
77views Hardware» more  ISCAS 1995»
13 years 8 months ago
Exploration of Area and Performance Optimized Datapath Design Using Realistic Cost Metrics
We present a novel technique for datapath allocation, which incorporates interconnection area and delay estimates based on dynamic oorplanning. In this approach, datapath area is ...
Kyumyung Choi, Steven P. Levitan
ASPDAC
2008
ACM
91views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Heuristic power/ground network and floorplan co-design method
It's a trend to consider power supply integrity at early stage to improve the design quality. In this paper, we propose a novel algorithm to optimize floorplan together with P...
Xiaoyi Wang, Jin Shi, Yici Cai, Xianlong Hong
ASPDAC
2008
ACM
150views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Bus-aware microarchitectural floorplanning
Abstract-- In this paper we present the first bus-aware microarchitectural floorplanning. Our goal is to study the impact of bus routability on other important floorplanning object...
Dae Hyun Kim, Sung Kyu Lim
ASAP
1996
IEEE
145views Hardware» more  ASAP 1996»
13 years 9 months ago
A Synthesis System For Bus-Based Wavefront Array Architectures
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
Reiner W. Hartenstein, Jürgen Becker, Michael...
ASPDAC
2008
ACM
74views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Large-scale fixed-outline floorplanning design using convex optimization techniques
A two-stage optimization methodology is proposed to solve the fixed-outline floorplanning problem that is a global optimization problem for wirelength minimization. In the first st...
Chaomin Luo, Miguel F. Anjos, Anthony Vannelli