444 search results - page 88 / 89 » Flow Level Simulation of Large IP Networks |
MICRO
2003
IEEE
13 years 11 months ago
2003
IEEE
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
Substantial increase in leakage current and threshold voltage fluctuations are making design of robust wide fan-in dynamic gates a challenging task. Traditionally, a PMOS keeper t...
BMCBI
2010
13 years 3 months ago
2010
Background: Physical maps are the substrate of genome sequencing and map-based cloning and their construction relies on the accurate assembly of BAC clones into large contigs that...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
SIGMETRICS
2005
ACM
13 years 11 months ago
2005
ACM
Wide-spread deployment of infrastructure WLANs has made Wi-Fi an integral part of today’s Internet access technology. Despite its crucial role in affecting end-to-end performan...