162 search results - page 33 / 33 » Flow Logics for Constraint Based Analysis |
KBSE
2005
IEEE
13 years 10 months ago
2005
IEEE
In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...
MJ
2011
12 years 11 months ago
2011
New tendencies envisage 2D/3D Multi-Processor System-On-Chip (MPSoC) as a promising solution for the consumer electronics market. MPSoCs are complex to design, as they must execute...