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FMCAD
2008
Springer
13 years 7 months ago
Word-Level Sequential Memory Abstraction for Model Checking
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
Per Bjesse
TII
2008
98views more  TII 2008»
13 years 5 months ago
Formal Methods for Systems Engineering Behavior Models
Abstract--Safety analysis in Systems Engineering (SE) processes, as usually implemented, rarely relies on formal methods such as model checking since such techniques, however power...
Charlotte Seidner, Olivier H. Roux
FMCAD
2000
Springer
13 years 9 months ago
The Semantics of Verilog Using Transition System Combinators
Abstract. Since the advent of model checking it is becoming more common for languages to be given a semantics in terms of transition systems. Such semantics allow to model check pr...
Gordon J. Pace
ICCD
2005
IEEE
124views Hardware» more  ICCD 2005»
13 years 11 months ago
Model Checking C Programs Using F-SOFT
— With the success of formal verification techniques like equivalence checking and model checking for hardware designs, there has been growing interest in applying such techniqu...
Franjo Ivancic, Ilya Shlyakhter, Aarti Gupta, Mala...
FDL
2003
IEEE
13 years 11 months ago
Using Symbolic Simulation for Bounded Property Checking
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
Jürgen Ruf, Prakash Mohan Peranandam, Thomas ...