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HF
2002
95views more  HF 2002»
13 years 5 months ago
Formal Verification of Human-Automation Interaction
This paper discusses a formal and rigorous approach to the analysis of operator interaction with machines. It addresses the acute problem of detecting design errors in human-machi...
Asaf Degani, Michael Heymann
JSA
2008
131views more  JSA 2008»
13 years 4 months ago
Formal verification of ASMs using MDGs
We present a framework for the formal verification of abstract state machine (ASM) designs using the multiway decision graphs (MDG) tool. ASM is a state based language for describ...
Amjad Gawanmeh, Sofiène Tahar, Kirsten Wint...
FMCAD
2007
Springer
13 years 9 months ago
Transaction Based Modeling and Verification of Hardware Protocols
Modeling hardware through atomic guard/action transitions with interleaving semantics is popular, owing to the conceptual clarity of modeling and verifying the high level behavior ...
Xiaofang Chen, Steven M. German, Ganesh Gopalakris...
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 2 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
ISPD
1997
ACM
100views Hardware» more  ISPD 1997»
13 years 9 months ago
A pseudo-hierarchical methodology for high performance microprocessor design
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
A. Bertolet, K. Carpenter, Keith M. Carrig, Albert...