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» Formal Verification of an ARM Processor
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FMCAD
1998
Springer
13 years 9 months ago
Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
Sergey Berezin, Armin Biere, Edmund M. Clarke, Yun...
CAV
1998
Springer
86views Hardware» more  CAV 1998»
13 years 9 months ago
Formal Verification of Out-of-Order Execution Using Incremental Flushing
We present a two-part approach for verifying out-of-order execution. First, the complexity of out-of-order issue and scheduling is handled by creating der abstraction of the out-of...
Jens U. Skakkebæk, Robert B. Jones, David L....
AMAI
2004
Springer
13 years 10 months ago
Using Automatic Case Splits and Efficient CNF Translation to Guide a SAT-solver when Formally Verifying Out-Of-Order Processors
The paper integrates automatically generated case-splitting expressions, and an efficient translation to CNF, in order to formally verify an out-of-order superscalar processor havi...
Miroslav N. Velev
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
13 years 9 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
ASIAN
2006
Springer
118views Algorithms» more  ASIAN 2006»
13 years 9 months ago
An Approach to Formal Verification of Arithmetic Functions in Assembly
Abstract. It is customary to write performance-critical parts of arithmetic functions in assembly: this enables finely-tuned algorithms that use specialized processor instructions....
Reynald Affeldt, Nicolas Marti