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» Formal Verification of an ARM Processor
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IASTEDSEA
2004
13 years 6 months ago
Higher-order strategic programming: A road to software assurance
Program transformation through the repeated application of simple rewrite rules is conducive to formal verification. In practice, program transformation oftentimes requires data t...
Victor L. Winter, Steve Roach, Fares Fraij
POPL
2004
ACM
14 years 5 months ago
Symbolic transfer function-based approaches to certified compilation
We present a framework for the certification of compilation and of compiled programs. Our approach uses a symbolic transfer functions-based representation of programs, so as to ch...
Xavier Rival
VLSID
2002
IEEE
189views VLSI» more  VLSID 2002»
14 years 5 months ago
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, ...
TCAD
2008
101views more  TCAD 2008»
13 years 5 months ago
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
POPL
2009
ACM
14 years 6 months ago
The theory of deadlock avoidance via discrete control
Deadlock in multithreaded programs is an increasingly important problem as ubiquitous multicore architectures force parallelization upon an ever wider range of software. This pape...
Manjunath Kudlur, Scott A. Mahlke, Stéphane...