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» From ASIC to ASIP: The Next Design Discontinuity
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ICCD
2002
IEEE
146views Hardware» more  ICCD 2002»
14 years 2 months ago
From ASIC to ASIP: The Next Design Discontinuity
A variety of factors is making it increasingly difficult and expensive to design and manufacture traditional Application Specific Integrated Circuits (ASICs). This has started a s...
Kurt Keutzer, Sharad Malik, A. Richard Newton
EMSOFT
2005
Springer
13 years 10 months ago
A unified HW/SW interface model to remove discontinuities between HW and SW design
One major challenge in System-on-Chip (SoC) design is the definition and design of interfaces between hardware and software. Traditional ASIC designer and software designer model ...
Aimen Bouchhima, Xi Chen, Frédéric P...
DAC
2007
ACM
14 years 6 months ago
Design Methodology for Pipelined Heterogeneous Multiprocessor System
Multiprocessor SoC systems have led to the increasing use of parallel hardware along with the associated software. These approaches have included coprocessor, homogeneous processo...
Seng Lin Shee, Sri Parameswaran
DAC
1999
ACM
13 years 9 months ago
A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs
In deep submicron technology, IR-drop and clock skew issues become more crucial to the functionality of chip. This paper presents a oorplan-based power and clock distribution meth...
Joon-Seo Yim, Seong-Ok Bae, Chong-Min Kyung
VLSID
2001
IEEE
144views VLSI» more  VLSID 2001»
14 years 5 months ago
Next Generation Network Processors
Networking hardware manufacturers face the dual demands of supporting ever increasing bandwidth requirements, while also delivering new features, such as the ability to implement ...
Deepak Kataria