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» From ASIC to ASIP: The Next Design Discontinuity
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ICCD
2005
IEEE
221views Hardware» more  ICCD 2005»
14 years 3 months ago
Broadband Impedance Matching for Inductive Interconnect in VLSI Packages
Abstract— Noise induced by impedance discontinuities from VLSI packaging is one of the leading challenges facing system level designers in the next decade. The performance of IC ...
Brock J. LaMeres, Sunil P. Khatri
ICRA
2005
IEEE
106views Robotics» more  ICRA 2005»
13 years 11 months ago
A Fast Online Gait Planning with Boundary Condition Relaxation for Humanoid Robots
— A fast online gait planning method is proposed. Based on an approximate dynamical biped model whose mass is concentrated to COG, general solution of the equation of motion is a...
Tomomichi Sugihara, Yoshihiko Nakamura
CODES
2007
IEEE
14 years 12 days ago
ESL design and HW/SW co-verification of high-end software defined radio platforms
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
A. C. H. Ng, J. W. Weijers, Miguel Glassee, Thomas...
ISLPED
2009
ACM
110views Hardware» more  ISLPED 2009»
14 years 18 days ago
End-to-end validation of architectural power models
While researchers have invested substantial effort to build architectural power models, validating such models has proven difficult at best. In this paper, we examine the accurac...
Madhu Saravana Sibi Govindan, Stephen W. Keckler, ...
DAC
1999
ACM
13 years 10 months ago
Panel: What is the Proper System on Chip Design Methodology
ion model or flexible PCB solutions cannot offer a valid solution for the next millinium SoCs . James G. Dougherty, Integrated Systems Silicon LTD, Belfast, Northern Ireland ISS an...
Richard Goering, Pierre Bricaud, James G. Doughert...