5 search results - page 1 / 1 » Fully Parallel Hardware Software Codesign for Multi-Dimensio... |
CODES
1996
IEEE
13 years 8 months ago
1996
IEEE
The design of multi-dimensional systems using hardware/software codesign allows a significant improvement in the development cycle. This paper presents a technique that enables a ...
CODES
2005
IEEE
13 years 10 months ago
2005
IEEE
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP) applications. It is important to study effective and efficient transformation ...
CODES
2003
IEEE
13 years 9 months ago
2003
IEEE
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
CODES
2007
IEEE
13 years 10 months ago
2007
IEEE
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
HPCA
2006
IEEE
14 years 4 months ago
2006
IEEE
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...