9 search results - page 1 / 2 » Fully Pipelined Hardware Implementation of 128-Bit SEED Bloc... |
ARC
2009
Springer
13 years 11 months ago
2009
Springer
As the need for information security increases in our everyday life, the job of encoding/decoding for secure information delivery becomes a critical issue in data network systems. ...
ISCAS
2008
IEEE
13 years 11 months ago
2008
IEEE
— In the present paper, we introduce high-performance hardware architectures for the 128-bit block cipher CLEFIA and evaluate their ASIC performances in comparison with the ISO/I...
DAC
2001
ACM
14 years 5 months ago
2001
ACM
: Fault-based side channel cryptanalysis is very effective against symmetric and asymmetric encryption algorithms. Although straightforward hardware and time redundancy based concu...
FPL
2003
Springer
13 years 10 months ago
2003
Springer
RC6 is a symmetric-key algorithm which encrypts 128-bit plaintext blocks to 128-bit ciphertext blocks. The encryption process involves four operations: integer addition modulo 2w ,...
CHES
2006
Springer
13 years 8 months ago
2006
Springer
In this paper, we propose a new block cipher HIGHT with 64-bit block length and 128-bit key length. It provides low-resource hardware implementation, which is proper to ubiquitous ...