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» Functional Dependency for Verification Reduction
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CAV
2004
Springer
108views Hardware» more  CAV 2004»
13 years 8 months ago
Functional Dependency for Verification Reduction
Abstract. The existence of functional dependency among the state variables of a state transition system was identified as a common cause of inefficient BDD representation in formal...
Jie-Hong Roland Jiang, Robert K. Brayton
ICCAD
2010
IEEE
140views Hardware» more  ICCAD 2010»
13 years 2 months ago
Reduction of interpolants for logic synthesis
Craig Interpolation is a state-of-the-art technique for logic synthesis and verification, based on Boolean Satisfiability (SAT). Leveraging the efficacy of SAT algorithms, Craig In...
John D. Backes, Marc D. Riedel
FMCAD
1998
Springer
13 years 8 months ago
Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
Sergey Berezin, Armin Biere, Edmund M. Clarke, Yun...
ICCAD
2007
IEEE
102views Hardware» more  ICCAD 2007»
14 years 1 months ago
Scalable exploration of functional dependency by interpolation and incremental SAT solving
Functional dependency is concerned with rewriting a Boolean function f as a function h over a set of base functions {g1, …, gn}, i.e. f = h(g1, …, gn). It plays an important r...
Chih-Chun Lee, Jie-Hong Roland Jiang, Chung-Yang H...
LISP
2002
107views more  LISP 2002»
13 years 4 months ago
Dependent Types for Program Termination Verification
Program termination verification is a challenging research subject of significant practical importance. While there is already a rich body of literature on this subject, it is sti...
Hongwei Xi