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» GRACE: Generative Robust Analog Circuit Exploration
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ITC
2000
IEEE
80views Hardware» more  ITC 2000»
13 years 9 months ago
A stand-alone integrated test core for time and frequency domain measurements
An area efficient and robust integrated test core for mixed-signal circuits is described. The core consists of a completely digital implementation, except for a simple reconstructi...
Mohamed Hafed, Nazmy Abaskharoun, Gordon W. Robert...
FOCS
1999
IEEE
13 years 9 months ago
Near-Optimal Conversion of Hardness into Pseudo-Randomness
Various efforts ([?, ?, ?]) have been made in recent years to derandomize probabilistic algorithms using the complexity theoretic assumption that there exists a problem in E = dti...
Russell Impagliazzo, Ronen Shaltiel, Avi Wigderson
GLVLSI
2006
IEEE
185views VLSI» more  GLVLSI 2006»
13 years 11 months ago
Application of fast SOCP based statistical sizing in the microprocessor design flow
In this paper we have applied statistical sizing in an industrial setting. Efficient implementation of the statistical sizing algorithm is achieved by utilizing a dedicated interi...
Murari Mani, Mahesh Sharma, Michael Orshansky
ESCIENCE
2007
IEEE
13 years 11 months ago
Towards a Grid-Enabled Simulation Framework for Nano-CMOS Electronics
The electronics design industry is facing major challenges as transistors continue to decrease in size. The next generation of devices will be so small that the position of indivi...
Liangxiu Han, Asen Asenov, Dave Berry, Campbell Mi...