15 search results - page 1 / 3 » Gate-level power estimation using tagged probabilistic simul... |
TCAD
1998
13 years 5 months ago
1998
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
DATE
1999
IEEE
13 years 10 months ago
1999
IEEE
Estimating switching activity is a crucial step in optimizing circuits for low power. In this paper, a fast gate level switching activity estimator for combinational circuits will...
WIMOB
2008
IEEE
14 years 8 hour ago
2008
IEEE
— Recently, the RFID tag system is paid attention to as an identification source. Each RFID tag is attached to some object. With the unique ID of RFID tag, a user identifies the ...
ICCAD
2005
IEEE
14 years 2 months ago
2005
IEEE
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...
ICCD
2005
IEEE
14 years 2 months ago
2005
IEEE
Consideration of pairs of transition in probabilistic simulation allows power estimation for digital circuits in which inertial delays can filter glitches [5]. However, the merit ...