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» General Iteration graphs and Boolean automata circuits
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CORR
2011
Springer
149views Education» more  CORR 2011»
12 years 12 months ago
General Iteration graphs and Boolean automata circuits
This article is set in the eld of regulation networks modeled by discrete dynamical systems. It focuses on Boolean automata networks. In such networks, there are many ways to upd...
Mathilde Noual
CSR
2008
Springer
13 years 6 months ago
Synchronization of Grammars
Abstract. Deterministic graph grammars are finite devices which generate the transition graphs of pushdown automata. We define the notion of synchronization by grammars, generalizi...
Didier Caucal, Stéphane Hassen
UC
2005
Springer
13 years 10 months ago
On Computational Complexity of Counting Fixed Points in Symmetric Boolean Graph Automata
Abstract. We study computational complexity of counting the fixed point configurations (FPs) in certain classes of graph automata viewed as discrete dynamical systems. We prove t...
Predrag T. Tosic, Gul A. Agha
GLVLSI
1996
IEEE
145views VLSI» more  GLVLSI 1996»
13 years 9 months ago
Boolean Function Representation Using Parallel-Access Diagrams
Inthispaperweintroduceanondeterministiccounterpart to Reduced, Ordered Binary Decision Diagrams for the representation and manipulation of logic functions. ROBDDs are conceptually...
Valeria Bertacco, Maurizio Damiani
TCAD
1998
126views more  TCAD 1998»
13 years 4 months ago
Iterative remapping for logic circuits
Abstract—This paper presents an aggressive optimization technique targeting combinational logic circuits. Starting from an initial implementation mapped on a given technology lib...
Luca Benini, Patrick Vuillod, Giovanni De Micheli