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ICS
2009
Tsinghua U.
14 years 16 days ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
MAM
2006
124views more  MAM 2006»
13 years 5 months ago
Design optimization and space minimization considering timing and code size via retiming and unfolding
The increasingly complicated DSP processors and applications with strict timing and code size constraints require design automation tools to consider multiple optimizations such a...
Qingfeng Zhuge, Chun Xue, Zili Shao, Meilin Liu, M...
CODES
2005
IEEE
13 years 11 months ago
Iterational retiming: maximize iteration-level parallelism for nested loops
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP) applications. It is important to study effective and efficient transformation ...
Chun Xue, Zili Shao, Meilin Liu, Edwin Hsing-Mean ...
CODES
2004
IEEE
13 years 9 months ago
Optimizing the memory bandwidth with loop fusion
The memory bandwidth largely determines the performance and energy cost of embedded systems. At the compiler level, several techniques improve the memory bandwidth at the scope of...
Paul Marchal, José Ignacio Gómez, Fr...
EUROPAR
2007
Springer
13 years 12 months ago
Compositional Approach Applied to Loop Specialization
An optimizing compiler has a hard time to generate a code which will perform at top speed for an arbitrary data set size. In general, the low level optimization process must take i...
Lamia Djoudi, Jean-Thomas Acquaviva, Denis Barthou