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» Generation of BDDs from hardware algorithm descriptions
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ICCAD
1996
IEEE
92views Hardware» more  ICCAD 1996»
13 years 9 months ago
Generation of BDDs from hardware algorithm descriptions
We propose a new method for generating BDDs from hardware algorithm descriptions written in a programming language. Our system can deal with control structures, such as conditiona...
Shin-ichi Minato
ASPDAC
2005
ACM
120views Hardware» more  ASPDAC 2005»
13 years 7 months ago
STACCATO: disjoint support decompositions from BDDs through symbolic kernels
Abstract— A disjoint support decomposition (DSD) is a representation of a Boolean function F obtained by composing two or more simpler component functions such that the component...
Stephen Plaza, Valeria Bertacco
VALUETOOLS
2006
ACM
164views Hardware» more  VALUETOOLS 2006»
13 years 11 months ago
Analysis of Markov reward models using zero-suppressed multi-terminal BDDs
High-level stochastic description methods such as stochastic Petri nets, stochastic UML statecharts etc., together with specifications of performance variables (PVs), enable a co...
Kai Lampka, Markus Siegle
ISSS
1999
IEEE
120views Hardware» more  ISSS 1999»
13 years 9 months ago
RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions
Abstract--Reservation Tables (RTs) have long been used to detect conflicts between operations that simultaneously access the same architectural resource. Traditionally, these RTs h...
Peter Grun, Ashok Halambi, Nikil D. Dutt, Alexandr...
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 1 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna