185 search results - page 36 / 37 » Generation of Interpretive and Compiled Instruction Set Simu... |
CGO
2005
IEEE
13 years 11 months ago
2005
IEEE
Software code caches are becoming ubiquitous, in dynamic optimizers, runtime tool platforms, dynamic translators, fast simulators and emulators, and dynamic compilers. Caching fre...
DAC
1999
ACM
13 years 9 months ago
1999
ACM
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
DAC
2006
ACM
13 years 7 months ago
2006
ACM
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
NIPS
2003
13 years 6 months ago
2003
Recent work has examined the estimation of models of stimulus-driven neural activity in which some linear filtering process is followed by a nonlinear, probabilistic spiking stag...
IPPS
1998
IEEE
13 years 9 months ago
1998
IEEE
Characterizing shared-memory applications provides insight to design efficient systems, and provides awareness to identify and correct application performance bottlenecks. Configu...