52 search results - page 1 / 11 » Generic Pipelined Processor Modeling and High Performance Cy... |
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
ISPASS
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
DAC
1999
ACM
14 years 5 months ago
1999
ACM
Abstract { This paper presents the machine description language LISA for the generation of bitand cycle accurate models of DSP processors. Based on a behavioral operation descripti...
SAMOS
2005
Springer
13 years 10 months ago
2005
Springer
An analytical performance model for out of order issue superscalar micro-processors is presented. This model quantifies the performance impacts of micro-architecture design option...
RTCSA
2007
IEEE
13 years 11 months ago
2007
IEEE
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...