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ICCAD
1998
IEEE
93views Hardware» more  ICCAD 1998»
13 years 9 months ago
Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation
This paper considers simultaneous gate and wire sizing for general very large scale integrated (VLSI) circuits under the Elmore delay model. We present a fast and exact algorithm w...
Chung-Ping Chen, Chris C. N. Chu, D. F. Wong
ISPD
1998
ACM
101views Hardware» more  ISPD 1998»
13 years 9 months ago
Greedy wire-sizing is linear time
—The greedy wire-sizing algorithm (GWSA) has been experimentally shown to be very efficient, but no mathematical analysis on its convergence rate has ever been reported. In this...
Chris C. N. Chu, D. F. Wong
DAC
1999
ACM
14 years 5 months ago
Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching
Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the Elmore delay model. Using the Devgan noise metric [6] ...
Chung-Ping Chen, Noel Menezes
CVPR
2011
IEEE
13 years 2 months ago
Globally-Optimal Greedy Algorithms for Tracking a Variable Number of Objects
We analyze the computational problem of multi-object tracking in video sequences. We formulate the problem using a cost function that requires estimating the number of tracks, as ...
Hamed Pirsiavash, Deva Ramanan, Charless Fowlkes
NAACL
2003
13 years 6 months ago
Greedy Decoding for Statistical Machine Translation in Almost Linear Time
We present improvements to a greedy decoding algorithm for statistical machine translation that reduce its time complexity from at least cubic (  ¢¡¤£¦¥¨§ when applied na...
Ulrich Germann