188 search results - page 2 / 38 » Guiding Architectural SRAM Models |
ICCD
2001
IEEE
14 years 1 months ago
2001
IEEE
‡ Physical and generic models that analytically couple the array architecture of CMOS SRAMs with the wire lengths and fan-outs along critical paths to decode and sense data are r...
DAC
2009
ACM
14 years 6 months ago
2009
ACM
With aggressive technology scaling, SRAM design has been seriously challenged by the difficulties in analyzing rare failure events. In this paper we propose to create statistical ...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
1 Soft errors induced by radiation are an increasing problem in the microelectronic field. Although traditional models estimate the reliability of memories suffering Single Event U...
VLSID
2004
IEEE
14 years 5 months ago
2004
IEEE
The detection of all open defects within 6T SRAM cells is always a challenge due to the significant test time requirements. This paper proposes a new design-for-test (DFT) techniq...
FPGA
2005
ACM
13 years 10 months ago
2005
ACM
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...