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» Hardware Acceleration of HMMER on FPGAs
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FPL
2008
Springer
153views Hardware» more  FPL 2008»
13 years 6 months ago
Exploring FPGA network on chip implementations across various application and network loads
Abstract-The network on chip will become a future general purpose interconnect for FPGAs much like today's standard OPB or PLB bus architectures. However, performance characte...
Graham Schelle, Dirk Grunwald
CCECE
2006
IEEE
13 years 11 months ago
Survey of Biological High Performance Computing: Algorithms, Implementations and Outlook Research
During recent years there has been an explosive growth of biological data coming from genome projects, proteomics, protein structure determination, and the rapid expansion in digi...
Nasreddine Hireche, J. M. Pierre Langlois, Gabriel...
DATE
1998
IEEE
114views Hardware» more  DATE 1998»
13 years 9 months ago
Design Of Future Systems
Near-future linac projects put yet unreached requirements on the LLRF control hardware in both performance and manageability. Meeting their field stability targets requires a clea...
Ian Page
DAC
2002
ACM
14 years 6 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik