112 search results - page 23 / 23 » Hardware Acceleration of Matrix Multiplication on a Xilinx F... |
ARC
2007
Springer
13 years 9 months ago
2007
Springer
Abstract. Conventional rigid router-based networks on chip incur certain overheads due to huge occupied logic resources and topology embedding, i.e., the mapping of a logical netwo...
MJ
2011
13 years 6 days ago
2011
New tendencies envisage 2D/3D Multi-Processor System-On-Chip (MPSoC) as a promising solution for the consumer electronics market. MPSoCs are complex to design, as they must execute...