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SASP
2008
IEEE
162views Hardware» more  SASP 2008»
13 years 11 months ago
Accelerating Compute-Intensive Applications with GPUs and FPGAs
—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are F...
Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadr...
ICDE
2010
IEEE
248views Database» more  ICDE 2010»
14 years 5 months ago
FPGA Acceleration for the Frequent Item Problem
Abstract-- Field-programmable gate arrays (FPGAs) can provide performance advantages with a lower resource consumption (e.g., energy) than conventional CPUs. In this paper, we show...
Gustavo Alonso, Jens Teubner, René Mül...
VISUALIZATION
2002
IEEE
13 years 10 months ago
Simulating Fire with Texture Splats
We propose the use of textured splats as the basic display primitives for an open surface fire model. The high-detail textures help to achieve a smooth boundary of the fire and ...
Xiaoming Wei, Wei Li, Klaus Mueller, Arie E. Kaufm...
VTS
2005
IEEE
151views Hardware» more  VTS 2005»
13 years 11 months ago
A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers
: This project involves the design of a CMOS RF RMS Detector that converts the RMS voltage amplitude of an RF signal to a DC voltage. Its high input impedance and small area make i...
Alberto Valdes-Garcia, Radhika Venkatasubramanian,...
ICCAD
1999
IEEE
66views Hardware» more  ICCAD 1999»
13 years 9 months ago
Timing-safe false path removal for combinational modules
A delay abstraction of a combinational module is a compact representation of the delay information of the module, which carries effective pin-to-pin delay for each primary-input/pr...
Yuji Kukimoto, Robert K. Brayton